Conventional semiconductor packages have a plurality of external terminals such as solder balls, solder pastes, metal pins or metal pads, which are disposed at a substrate bottom to serve for surface mounting to an external PCB (Printed Circuit Board). The IC packages after fabrication should pass reliability tests in which TCT is one of reliability test items for semiconductor package product at the moment. However, due to a CTE (Coefficient of Thermal Expansion) mismatch existing between semiconductor package and external PCB, the external terminals are subjected to thermal stress to damage or crack during repeated up-and-down temperature cycles.
Referring to FIG. 1, a conventional semiconductor package 100 includes a substrate 110, a chip 120, an encapsulant 130 and a plurality of external terminals 140. The chip 120 is disposed on an upper surface 111 of the substrate 110 by a chip-attached layer 121 and bonding pads 122 of the chip 120 are electrically connected to the substrate 120 by a plurality of bonding wires 150. The encapsulant 130 is formed on the upper surface 111 of the substrate 110 to encapsulate the chip 120. Because the encapsulant 130 after fully cure is a relatively hard compound, the thermal stress generating during TCT concentrates on some of the external terminals 140 under the substrate 110, especially located at edges and corners of the lower surface 112 of the substrate 110, resulting in damage such as crack or electrical disconnection. A known solution of cracking problem is to apply a corner-bond adhesive at corners of the substrate 110 after surface-mounting the package 100 to fix corners of the substrate 110 so as to prevent the external terminals 140 from cracking. However, this treatment does not belong to a standard SMT fabrication process and results in rework difficulty. Not only an extra thermosetting process for the corner bond is needed resulting in SMT cost up, but also the semiconductor package 100 cannot be repaired or replaced after SMT.
A related solution had disclosed in U.S. Pat. No. 5,679,977, which shows a semiconductor chip assembly. Conventional full-surface covering encapsulate (or called molding compound) has disappeared. Additionally, flexible leads of flexible substrate are applied to connect the chip from the external terminals, the chip-attached layer between the chip and the flexible substrate is a compliant layer having resilience or low modulus, thus the external terminals may be movable with respect to the chip. However, this method mentioned above can be applied only for the non-encapsulant semiconductor chip assembly, not suitable for the conventional semiconductor package needing a rigid encapsulant bacause the encapsulant will re-fix the flexible substrate and the chip after curing resulting in the external terminals immovable with respect to the chip.